Equivalence of Logic Circuits and their Description in VHDL

In this paper, we define the equivalence of logic circuits and examine their description in VHDL. We can describe logic circuit components as relations between input and output signals in VHDL and implement such circuits on FPGA. In this case, it is necessary to verify the equivalence of VHDL descriptions and the actual logic circuits constructed based on these descriptions. In a previous work, we proved the logical correctness of some circuits using the Mizar system. We also verified the equivalence of VHDL descriptions and the proved logic circuits.